About

I was born in Ghana on November 24, 2003. I'm a triplet — my sisters are Nikita Marhguy and Amrita Marhguy. We grew up between Kumasi and Accra, and for several years our family lived primarily on a parked bus.

At thirteen, I charged phones with a car battery and nails heated in a coal pot — not because I was curious, but because we needed to survive. That same instinct drives how I build today: understand the physics, verify the design, ship something that works on real silicon and in production code.

Before Achimota School, I studied in Kumasi and at Rising Academy in Ablekuma.

In March 2021, Achimota School denied me admission because I wear dreadlocks as an expression of my Rastafarian faith. My father, Tereo Marhguy, challenged the decision in Ghana's High Court alongside the family of Oheneba Kwaku Nkrabea, who faced the same refusal.

On May 31, 2021, the Human Rights Division ruled in our favor — finding that denying us education over our hair violated our rights to education, dignity, and religious expression. The case drew national debate and international coverage from outlets including the Associated Press, Voice of America, and Deutsche Welle. I enrolled, finished secondary school, and the ruling has since been cited in broader conversations about religious freedom in Ghanaian education.

The full story is documented on Wikipedia and in the court record for Marhguy v. Achimota School.

• Hardware Engineering: This fall I'm joining Fluid Silicon Inc. at the Pennovation Center as a Hardware Research Engineer Intern: RTL design in HDL, then verification in emulation and simulation.
• The Builds: I'm building Tomato (GitHub) — a Discrete 32-bit Polymorphic Dual-LUT3 CPU from discrete logic through PCB tapeout — and shipping low-latency networking hardware in SystemVerilog. I've also built an 8-bit discrete-transistor ALU from first principles.
• Open Source Contributions: I'm a contributor to open-source EDA tools.
  • LibreLane: Merged PR #1015 gating deprecated abc -fast for Yosys ≥ 0.68, shipped as 3.0.8. Also merged PR #1016 so Yosys check-error counts include both pre- and post-synthesis reports, shipped as 3.0.10.
  • OpenROAD: Parsing fixes for LEF58_MINWIDTH (PR #11107).
  • Verilator: Fixed Linux peak memory reporting (PR #8070).
  • OpenFPGA.
• Software & Teaching: Professionally, I'm interning with Aragorn AI on production backends and technical documentation. Previously hardware at Vero Electric on battery management infrastructure. I taught through Fife-Penn STEM & CS Academy and spent Summer 2026 as an AR/VR instructor with Howard University STEM Achievers.

For press coverage and a fuller biography, see my Wikipedia article.